The EPM3064ATC100-10 is an affordable, powerful gadget built on the Altera MAX architecture. The EEPROM-based MAX 3000A devices were created using cutting-edge CMOS technology and operate with a 3.3-V supply voltage. They offer 600 to 10,000 useable gates, ISP, pin-to-pin delays as quick as 4.5 ns, and counter rates up to 227.3 MHz. The PCI Special Interest Group's (PCI SIG) timing specifications are compatible with the EPM3064ATC100-10 in the speed grades of -4, -5, -6, -7, and -10.
Maximum ratings for EPM3064ATC100-10 are as follows: (3)IOUT DC output current, per pin: -25 to 25 mA; (1)VCC Supply voltage, with respect to ground: -0.5 to 4.6 V; (2)VI DC input voltage, with respect to ground: -2.0 to 5.75 V; -65 to 150 °C for storage; (4)TSTG Storage temperature; (5)TA Ambient temperature -65 to 135 °C when biased; (6) TJ Junction temperature Bias temperature for PQFP and TQFP packages: 135 °C.
Features of EPM3064ATC100-10 include: (1) Built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability; (2) High performance, low cost CMOS EEPROM-based programmable logic devices (PLDs) built on a MAXR architecture; (3) Built-in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990; (4)High-density PLDs with 600–10,000 usable gates; (5)4.5–ns pin–to–pin logic delays; (6)MultiVoltTM I/O interface allowing device core to operate at 3.3 V; (7)Pin counts ranging from 44–256 in various thin quad flat pack (TQFP), plastic quad flat pack (PQFP), plastic J–lead chip carrier (PLCC), and FineLine BGATM packages.
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